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LTC5587 1 5587f block diagram features description 6 ghz rms power detector with digital output the ltc ? 5587 is a 10mhz to 6ghz, low power monolithic precision rms power detector with an integrated 12-bit serial analog-to-digital converter (adc). the rms detec- tor uses a proprietary technique to accurately measure the rf power of modulated signals with crest-factor as high as 12db. for an input frequency of 2.14ghz the detection range is from C34dbm to 6dbm. the serial digital output of the detector is a 12-bit word value that is directly pro- portional to the rf signal power measured in dbm. the LTC5587 is suitable for precision power measurement for a wide variety of rf standards, including lte, wimax, w-cdma, td-scdma, cdma, cdma2000, edge, gsm, etc. the dc output of the detector is connected in series with an on-chip 300 resistor to the analog output pin (v out ). this enables further filtering of the output modu- lation ripple using an off-chip capacitor before analog-to- digital conversion. the adc features include no data latency, no missing codes, and a sampling rate of up to 500ksps. a dedicated external reference pin (v ref ) can be tied to v dd or other suitable low-impedance voltage reference to set the adc full-scale input voltage range. the adc also features an automatic power down after each conversion making the LTC5587 ideal for low-power applications. applications n frequency range: 10mhz to 6ghz n accurate power measurement of high crest factor (up to 12db) waveforms n 40db log linear dynamic range n exceptional accuracy over temperature n single-ended rf input n 0.014db/bit (12-bit) adc resolution (v ref = 1.8v) n adc sample rate up to 500ksps n spi/microwire serial i/o n compatible with 1v to 3.6v digital logic n fast response time: 1s rise, 8s fall n low power: 3ma at 3.3v and 500ksps n small 3mm 3mm 12-pin dfn package n lte, wimax, w-cdma, td-scdma, cdma, cdma2000, edge, gsm n pico-cells, femto-cells rf power control n wireless repeaters n catv/dvb transmitters n mimo wireless access points n portable rms power measurement n antenna monitor l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 5587 bd exposed pad v out sdo v dd v ref gnd v cc en c sq ov dd rf 7 4 13 150khz lpf output buffer 300 rms detector three-state serial output port s/h 12-bit adc 11 10 8 9 6 3 1 sck 2 conv 12 timing logic bias 5 linearity error vs rf input power 2140mhz modulated waveforms 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g12 t a = 25c cw wcdma, ul wcdma dl 1c wcdma dl 4c lte dl 1c lte dl 4c datasheet.in
LTC5587 2 5587f pin configuration absolute maximum ratings (note 1) top view dfn package 12-lead (3mm 3mm) plastic dfn 12 11 8 9 10 4 5 3 2 1 conv v dd v ref en v cc rf sdo sck ov dd v out gnd c sq 6 7 13 gnd t jmax = 150c, ja = 76c/w exposed pad (pin 13) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range LTC5587idd#pbf LTC5587idd#trpbf lfrh 12-lead (3mm 3mm) plastic dfn C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ v dd , v cc voltage, (note 12) ........................................4v ov dd supply voltage ......................min(v dd + 0.3v, 4v) maximum input signal power (average) .............15dbm maximum input signal power (peak) ...................25dbm dc voltage at rf .......................................... C0.3v to 2v v out voltage ................................... C0.3v to v dd + 0.3v en voltage ...................................... C0.3v to v dd + 0.3v sdo, sck, conv voltage ................ C0.3v to v dd + 0.3v v ref voltage .................................... C0.3v to v dd + 0.3v power dissipation ...............................................100mw maximum junction temperature, t jmax ............... 150c operating temperature range (note 2)....C40c to 85c storage temperature range ................... C65c to 150c caution: this part is sensitive to electrostatic discharge. it is very important that proper esd precautions be observed when handling the LTC5587. parameter conditions min typ max units rf input input frequency range (note 4) 10 to 6000 mhz input impedance 205||1.6 ||pf f rf = 450mhz rf input power range externally matched to 50 source C34 to 6 dbm linear dynamic range, cw (note 3) 1db linearity error 40 db linear dynamic range, cdma (note 3) 1db linearity error; cdma 4-carrier 40 db output slope 73 lsb/db logarithmic intercept (note 5) C42 dbm output variation vs tem perature n ormalized to output at 25c; p in = C34dbm to 6dbm 1 db electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 2). v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. test circuit is shown in figure 1. datasheet.in
LTC5587 3 5587f parameter conditions min typ max units output variation vs temperature norm alized to output at 25c; p in = C27dbm to C10dbm 0.5 db deviation from cw response; p in = C34dbm to 0dbm tetra /4 dqpsk cdma 4-carrier 64-channel fwd 1.23mcps 0.1 0.5 db db 2nd order harmonic distortion at rf input; cw input; p in = 0dbm C57 dbc 3rd order harmonic distortion at rf input; cw input; p in = 0dbm C52 dbc f rf = 880mhz rf input power range cw input: externally matched to 50 source C34 to 6 dbm linear dynamic range, cw (note 3) 1db linearity error 40 db linear dynamic range, edge (note 3) 1db linearity error; edge 3/8-shifted 8psk 40 db output slope 73 lsb/db logarithmic intercept (note 5) C42 dbm output variation vs temperature normalized to output at 25c; p in = C34dbm to 6dbm 1 db output variation vs temperature norm alized to output at 25c; p in = C27dbm to C10dbm 0.5 db deviation from cw response; p in = C34dbm to 6dbm edge 3/8 shifted 8psk 0.1 db f rf = 2140mhz rf input power range cw input: externally matched to 50 source C34 to 6 dbm linear dynamic range, cw (note 3) 1db linearity error 43 db linear dynamic range, wcdma (note 3) 1db linearity error; 4-carrier wcdma 37 db output slope 73 lsb/db logarithmic intercept (note 5) C42 dbm output variation vs temperature normalized to output at 25c; p in = C34dbm to 6dbm 1 db output variation vs temperature norm alized to output at 25c; p in = C27dbm to C10dbm 0.5 db deviation from cw response; p in = C34dbm to C4dbm wcdma 1-carrier uplink wcdma 64-channel 4-carrier downlink 0.1 0.5 db db f rf = 2600mhz rf input power range cw input: externally matched to 50 source C34 to 6 dbm linear dynamic range, cw (note 3) 1db linearity error 40 db output slope 73 lsb/db logarithmic intercept (note 5) C42 dbm output variation vs temperature normalized to output at 25c; p in = C34dbm to 6dbm 1 db output variation vs temperature norm alized to output at 25c; p in = C27dbm to C10dbm 0.5 db deviation from cw response; p in = C34dbm to 2dbm wimax ofdma preamble wimax ofdm burst 0.1 0.5 db db f rf = 3500mhz rf input power range cw input: externally matched to 50 source C30 to 6 dbm linear dynamic range, cw (note 3) 1db linearity error 36 db output slope 73 lsb/db logarithmic intercept (note 5) C40 dbm electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 2). v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. test circuit is shown in figure 1. datasheet.in
LTC5587 4 5587f parameter conditions min typ max units output variation vs temperature normalized to output at 25c; p in = C30dbm to 6dbm 1 db output variation vs temperature norm alized to output at 25c; p in = C27dbm to C10dbm 0.5 db deviation from cw response; p in = C34dbm to C4dbm wimax ofdma preamble wimax ofdm burst 0.1 0.5 db db detector analog output output dc voltage at v out no signal applied to rf input 180 mv output impedance internal series resistor allows for off-chip filter cap 300 output current sourcing/sinking 5/5 ma rise time (1000pf on v out ) 0.2v to 1.6v, 10% to 90%, f rf = 2140mhz 1 sec fall time (1000pf on v out ) 1.6v to 0.2v, 10% to 90%, f rf = 2140mhz 8 sec power supply rejection ratio (note 6) for cw rf input over operating input power range 49 db integrated output voltage noise 1 to 6.5 khz integration bw, p in = 0dbm cw 150 v rms peak-to-peak adc output noise c filt = 1000pf, p in = 0dbm cw 11 lsb adc resolution adc resolution (no missing codes) l 12 bits differential linearity error en = 0v, voltage on v out = 0v to 1.8v, v ref = 1.8v l 0.25 1 lsb measurement resolution 1lsb = v ref /(4096 ? 32mv/db), v ref = 1.8v 0.014 db/bit electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 2). v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. test circuit is shown in figure 1. adc digital timing symbol parameter conditions min typ max units f sampl(max) maximum sampling frequency (notes 8, 9) l 500 khz f sck shift clock frequency (notes 8, 9) l 50 mhz t sck shift clock period l 20 ns t throughput minimum throughput time, t acq + t conv l 2s t acq acquisition time l 0.5 s t conv conversion time l 1.5 s t 1 minimum positive conv pulse width (note 8) l 1.5 s t 2 sck setup time after conv (note 8) l 16 ns t 3 sdo enabled time after conv (notes 8, 9) l 16 ns t 4 sdo data valid access time after sck (notes 8, 9, 10) l 8ns t 5 sck low time (note 7) l 40% t sck t 6 sck high time (note 7) l 40% t sck t 7 sdo data valid hold time after sck (notes 8, 9, 10) l 4ns t 8 sdo into hi-z state time after conv (notes 8, 9) 6 ns adc digital inputs and outputs symbol parameter conditions min typ max units v ih sck, conv logic high input l 2v v il sck, conv logic low input l 0.8 v i ih logic high input current sck, conv = v dd l 2.5 a i il logic low input current sck, conv = 0v l C2.5 a datasheet.in
LTC5587 5 5587f electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 2). v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. test circuit is shown in figure 1. symbol parameter conditions min typ max units c in sck, conv input capacitance 2 pf v oh sdo logic high output i source = 200a l v dd C 0.2 v v ol sdo logic low output i sink = 200a l 0.2 v i oz hi-z output leakage conv = v dd l 3 a c oz hi-z output capacitance conv = v dd 4pf i source sdo source current sdo connected to gnd = 0v C10 ma i sink sdo sink current sdo connected to v dd 10 ma detector enable (en) low = off, high = on parameter conditions min typ max units en input high voltage (on) l 2v en input low voltage (off) l 0.3 v enable pin input current en = 3.3v 25 a turn on time; cw rf input v out within 10% of final value; p in = 0dbm 1 s turn off time; cw rf input v out < 0.18v; p in = 0dbm 8 s power supply ov dd supply voltage l 1 3.3 v dd v v dd supply voltage l 2.7 3.3 3.6 v v ref reference voltage l 1.4 v dd + 0.05 v v cc supply voltage should be equal to v dd l 2.7 3.3 3.6 v total supply current no rf input signal, adc operational at 500ksps no rf input signal, adc sleep-mode l l 3 1.4 4 2.5 ma ma shutdown current en = 0.3v, conv = 3.3v, adc sleep-mode 0.2 10 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. the maximum rf input power rating is guaranteed by design and engineering characterization, but not production tested. note 2: the LTC5587 is guaranteed to be functional over the operating temperature range from C40c to 85c. note 3: the linearity error is calculated by the difference between the incremental slope of the output and the average output slope from C20dbm to 0dbm. the dynamic range is defined as the range over which the linearity error is within 1db. note 4: an external capacitor at the c sq pin should be used for input frequencies below 250mhz. without this capacitor, lower frequency operation results in excessive rf ripple in the output voltage. note 5: logarithmic intercept is an extrapolated input power level from the best fitted log-linear straight line, where the converted output code is 0lsb. note 6: psrr determined as the db value of the change in converted output voltage over the change in v cc supply voltage at a given cw input power level. note 7: guaranteed by design not subject to test. note 8: guaranteed by characterization. all input signals are specified with t r = t f = 2ns (10% to 90% of v dd ) and timed from a voltage level of 1.6v. note 9: all timing specifications given are with a 10pf capacitance load. with a capacitance load greater than this value, a digital buffer or latch must be used. note 10: the time required for the output to cross the v ih or v il voltage. note 11: when pins v out and v ref are taken below gnd or above v dd , they will be clamped by internal diodes. this product can handle input currents greater than 100ma below gnd or above v dd without latchup. note 12: the v dd supply voltage can be the same as v cc and the pins can share a common bypass capacitor of 2.2f. datasheet.in
LTC5587 6 5587f typical performance characteristics output voltage and linearity error at 450mhz output voltage temperature variation from 25c at 450mhz linearity error vs rf input power 450mhz modulated waveforms output voltage and linearity error at 880mhz output voltage temperature variation from 25c at 880mhz linearity error vs rf input power 880mhz modulated waveforms output voltage vs frequency linearity error vs frequency rf input return loss vs frequency v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. v out = adc output (lsb) ? 1.8/4096. test circuit is shown in figure 1. rf input power (dbm) C40 v out (v) 0.8 1.8 2.0 C30 C20 C10 0.4 1.4 0.6 1.6 0.2 0 1.2 1.0 C35 C25 0 10 C15 C5 5 5587 g01 10mhz 450mhz 880mhz 2.14ghz 2.6ghz 3.5ghz 5.8ghz t a = 25c rf input power (dbm) C40 linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g02 10mhz 450mhz 880mhz 2.14ghz 2.6ghz 3.5ghz 5.8ghz t a = 25c 2 1 0 C2 C1 C3 3 frequency (ghz) 0 return loss (db) 1 2 6 3 4 5 5587 g03 l1= 3.3nh, c1= 1.8pf l1= 1.5nh, c1= 1.8pf l1= 0, c1= 1.5pf l1= 0, c1= 0.7pf l1= 0, c1= 0 t a = 25c C5 C10 C15 C25 C20 C30 0 rf input power (dbm) C40 v out (v) 0.8 1.8 2.0 C30 C20 C10 0.4 1.4 0.6 1.6 0.2 0 1.2 1.0 C0.5 2.0 2.5 C1.5 1.0 C1.0 1.5 C2.0 C2.5 0.5 0 C35 C25 0 10 C15 C5 5 5587 g04 25c 85c C 40c linearity error (db) 1 2 0 C1 C2 C3 3 rf input power (dbm) C40 variation (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g05 C40c 85c 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error(db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g06 t a = 25c cw tetra cdma 4c rf input power (dbm) C40 v out (v) linearity error (db) 0.8 1.8 2.0 C30 C20 C10 0.4 1.4 0.6 1.6 0.2 0 1.2 1.0 C0.5 2.0 2.5 C1.5 1.0 C1.0 1.5 C2.0 C2.5 0.5 0 C35 C25 0 10 C15 C5 5 5587 g07 25c 85c C 40c 2 1 0 C2 C1 C3 3 rf input power (dbm) C40 variation (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g08 C40c 85c 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error(db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g09 t a = 25c cw edge datasheet.in
LTC5587 7 5587f typical performance characteristics output voltage and linearity error at 2600mhz output voltage temperature variation from 25c at 2600 mhz linearity error vs rf input power 2.6ghz modulated waveforms output voltage and linearity error at 3500mhz output voltage temperature variation from 25c at 3500mhz linearity error vs rf input power 3.5ghz modulated waveforms output voltage and linearity error at 2140mhz output voltage temperature variation from 25c at 2140mhz linearity error vs rf input power 2140mhz modulated waveforms v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. v out = adc output (lsb) ? 1.8/4096. test circuit is shown in figure 1. rf input power (dbm) C40 v out (v) linearity error (db) 0.8 1.8 2.0 C30 C20 C10 0.4 1.4 0.6 1.6 0.2 0 1.2 1.0 C0.5 2.0 2.5 C1.5 1.0 C1.0 1.5 C2.0 C2.5 0.5 0 C35 C25 0 10 C15 C5 5 5587 g10 25c 85c C 40c 2 1 0 C2 C1 C3 3 rf input power (dbm) C40 variation (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g11 C40c 85c 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g12 t a = 25c cw wcdma, ul wcdma dl 1c wcdma dl 4c lte dl 1c lte dl 4c rf input power (dbm) C40 v out (v) linearity error (db) 0.8 1.8 2.0 C30 C20 C10 0.4 1.4 0.6 1.6 0.2 0 1.2 1.0 C0.5 2.0 2.5 C1.5 1.0 C1.0 1.5 C2.0 C2.5 0.5 0 C35 C25 0 C15 C5 510 5587 g13 25c 85c C 40c 2 1 0 C2 C1 C3 3 rf input power (dbm) C40 variation (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g14 C40c 85c 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g15 t a = 25c cw wimax ofdm preamble wimax ofdm burst wimax ofdma preamble rf input power (dbm) C40 v out (v) linearity error (db) 0.8 1.8 2.0 0 C30 C20 C10 10 0.4 1.4 0.6 1.6 0.2 1.2 1.0 C0.5 2.0 2.5 C1.5 1.0 C1.0 1.5 C2.0 C2.5 0.5 0 C35 C25 0 C15 C5 5 5587 g16 25c 85c C 40c 2 1 0 C2 C1 C3 3 rf input power (dbm) C40 variation (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g17 C40c 85c 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g18 t a = 25c cw wimax ofdma preamble wimax ofdm burst datasheet.in
LTC5587 8 5587f typical performance characteristics slope vs frequency slope distribution vs temperature supply current vs supply voltage logarithmic intercept vs frequency logarithmic intercept distribution vs temperature total supply current vs rf input power and sample rate output voltage and linearity error at 5800mhz output voltage temperature variation from 25c at 5800mhz linearity error vs rf input power 5.8ghz modulated wavefroms v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. v out = adc output (lsb) ? 1.8/4096. test circuit is shown in figure 1. rf input power (dbm) C40 v out (v) linearity error (db) 0.8 1.8 2.0 0 C30 C20 C10 10 0.4 1.4 0.6 1.6 0.2 1.2 1.0 C0.5 2.0 2.5 C1.5 1.0 C1.0 1.5 C2.0 C2.5 0.5 0 C35 C25 0 C15 C5 5 5587 g19 25c 85c C 40c 2 1 0 C2 C1 C3 3 rf input power (dbm) C40 variation (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g20 C40c 85c 2 1 0 C2 C1 C3 3 rf input power (dbm) linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g21 t a = 25c cw wimax ofdm burst frequency (ghz) 0 26 slope (mv/db) 30 12 4 35 34 28 32 6 5587 g23 t a = 25c slope (mv/db) 28 percentage distribution (%) 30 40 50 20 10 0 29 30 31 32 33 34 5587 g24 t a = C40c t a = 25c t a = 85c 4 3 1 2 0 5 supply voltage (v) supply current (ma) 2.8 3 3.2 2.7 2.9 3.4 3.6 3.1 3.3 3.5 5587 g25 f smpl = 500khz 85c 25c C40c frequency (ghz) 0 C50 logarithmic intercept (dbm) C40 12 4 35 C30 C45 C35 6 5587 g26 t a = 25c logarithmic intercept (dbm) C48 percentage distribution (%) 30 40 50 20 10 0 C47 C46 C45 C44 C43 C41 C42 5587 g27 t a = C40c t a = 25c t a = 85c 6 8 10 12 14 2 4 0 16 rf input power (dbm) C30 total supply current (ma) C20 C10 0 C25 C15 10 C5 5 15 5587 g28 500khz 100khz 200khz t a = 25c datasheet.in
LTC5587 9 5587f typical performance characteristics output transient response output transient response with rf pulse and en pulse output voltage and linearity error vs v cc at 2140mhz output transient response with cw rf and en pulse v cc = v dd = ov dd = 3.3v, v ref = 1.8v, en = 3.3v, f smpl = f smpl(max) and f sck = f sck(max) unless otherwise noted. v out = adc output (lsb) ? 1.8/4096. test circuit is shown in figure 1. 1.0 1.2 1.4 1.6 1.8 0 0.2 0.4 0.6 0.8 2.0 0 0.5 1.0 1.5 2.0 C2.5 C2.0 C1.5 C1.0 C0.5 2.5 rf input power (dbm) C40 v out (v) linearity error (db) C30 C20 C10 C35 C25 0 10 C15 C5 5 5587 g29 t a = 25c 2.7v 3.6v 3000 4000 0 1000 2000 5000 C5 0 C20 C15 C10 5 time (sec) 0 adc output (lsb) enable (v) 20 40 60 10 30 80 100 50 70 90 5587 g33 en pulse on p in = 10dbm p in = 0dbm p in = C10dbm p in = C20dbm p in = C30dbm t a = 25c en pulse off 3000 4000 0 1000 2000 5000 C5 0 C20 C15 C10 5 time (sec) 0 adc output (lsb) rf pulse enable (v) 20 40 60 10 30 80 100 50 70 90 5587 g32 rf pulse on p in = 10dbm p in = 0dbm p in = C10dbm p in = C20dbm p in = C30dbm t a = 25c rf pulse off 3000 4000 0 1000 2000 5000 C5 0 C20 C15 C10 5 time (sec) 0 adc output (lsb) rf pulse and enable (v) 20 40 60 10 30 80 100 50 70 90 5587 g31 rf and en pulse on p in = 10dbm p in = 0dbm p in = C10dbm p in = C20dbm p in = C30dbm rf and en pulse off t a = 25c datasheet.in
LTC5587 10 5587f pin functions sdo (pin 1): three-state serial data output. the a/d conversion result is shifted out on sdo as a serial data s tr e am w i th msb fir s t. t he da t a s tr e am consis t s of 12 bi t s of conversion data followed by trailing zeros. sck (pin 2): shift clock input. the sck serial clock syn- chronizes the serial data transfer. sdo data transitions on the falling edge of sck. ov dd (pin 3): adc output driver supply voltage, 1.0v to 3.6v. ov dd should be bypassed with a 1f ceramic capacitor. ov dd can be driven separately from v dd and ov dd can be higher than v dd . v out (pin 4): detector analog voltage output. an internal series 300 resistor at the detector output allows for simple r-c filtering with a capacitor placed on this pin to gnd. a 1000pf capacitor is recommended for a corner frequency of 500khz. c sq (pin 6): optional low-frequency range extension capacitor for frequencies below 250mhz. connect 0.01f from this pin to ground for 10mhz operation. rf (pin 7): rf input voltage. should be externally dc-blocked. a capacitor of 1000pf is recommended. this pin has an internal 205 termination. v cc (pin 8): detector power supply voltage, 2.7v to 3.6v. can be connected to the v dd voltage supply. v cc should be bypassed with a 1f ceramic capacitor. if v cc and v dd are tied together, then bypass with 2.2f. en (pin 9): detector enable. a logic low or no-connect on the enable pin shuts down the detector. a logic high enables the detector. an internal 500k pull-down resistor ensures the detector is off when the pin is left floating. v ref (pin 10): adc reference input voltage. v ref defines the input span of the adc, 0v to v ref . the v ref range is 1.4v to v dd . bypass to ground with a 1f ceramic capacitor. v dd (pin 11): adc power supply voltage, 2.7v to 3.6v. v dd should be bypassed with a 1f ceramic capacitor. conv (pin 12): c o n v e r t i n p u t . t h i s a c t i v e h i g h s i g n a l s t a r t s a conversion on the rising edge. the adc automatically powers down after conversion. a logic low on this input enables the sdo pin, allowing the data to be shifted out. gnd (pin 5, exposed pad pin 13): ground. for high- frequency operation, backside ground connection should have a low-inductance connection to the pcb ground using many through-hole vias. see layout information. block diagram 5587 bd exposed pad v out sdo v dd v ref gnd v cc en c sq ov dd rf 7 4 13 150khz lpf output buffer 300 rms detector three-state serial output port s/h 12-bit adc 11 10 8 9 6 3 1 sck 2 conv 12 timing logic bias 5 datasheet.in
LTC5587 11 5587f timing diagrams 5587 td01 t 8 hi-z 1.6v conv sdo v ih 5587 td02 v il t 7 1.6v sck sdo v ih 5587 td03 v il t 4 1.6v sck sdo sdo into hi-z state after conv rising edge sdo data valid hold time after sck falling edge sdo data valid access time after sck falling edge datasheet.in
LTC5587 12 5587f test circuit 5587 f01 sdo slk sdo slk ov dd v out gnd c sq gnd conv conv v dd v ref en v cc rf 12 11 10 9 8 7 13 LTC5587 c5 1f c3 0.01f c4 1000pf c2 1000pf l1 1.5nh r1 68 c8 1f c6 1f 1 2 3 4 5 6 v out c7 1f c1 1.8pf en rf v ref v dd ov dd v cc 0.018? 0.018? 0.062? rf gnd dc gnd ef = 4.4 ref des value size part number c5, c6, c7, c8 1f 0402 avx 0402zg105zat2a c3 0.01f 0402 avx 04023c103kat2a c2, c4 1000pf 0402 avx 04025c102kat2a r1 68 0402 crcw040268r1fked frequency range rf in match l1 c1 0.04 to 1.8ghz 3.3nh 1.8pf 1.75 to 2.2ghz 1.5nh 1.8pf 2.4 to 2.9ghz 0 1.5pf 2.8 to 3.8ghz 0 0.7pf 4.5 to 6.0ghz 0 0 figure 1. evaluation circuit schematic figure 2. evaluation circuit board datasheet.in
LTC5587 13 5587f operation the LTC5587 combines a proprietary high-speed power detector with an internal 150khz lowpass averaging filter and a true 12-bit successive approximation adc with a serial output interface. it can accurately measure the rms power of high crest-factor modulated rf signals. the output voltage of the rf power detector is converted to a 12-bit digital word that is directly proportional to the average rf input power in dbm. the part can be oper- ated from a single supply or dedicated supplies, allowing the user to select a specific voltage range for the adc conversion in addition to interfacing with 1.8v, 2.5v, or 3v digital systems. evaluation figure 1 shows the simplified evaluation circuit schematic, and figure 2 shows the associated board artwork. to en- sur e pr op er op er a t ion, go o d gr oundin g pr a c t i c e should b e followed in the board layout, with liberal placement of vias under the exposed pad of the package and around signal and digital lines. the evaluation board shown in figure 2 contains additional support circuitry not shown in figure 1 that includes an optional 3.3v regulator for the v dd , ov dd , and v cc supplies and an optional 1.8v regulator for the v ref reference. this onboard reference provides good accuracy (less than 5mv) over temperature, contributing less than 0.1db error to the adc output. to evaluate the digital output, the quickeval pc-based software can be used with the dc590b usb controller interface board. this board contains a generic usb to serial peripheral interface (spi) controller. a 14-pin ribbon cable connects the evaluation board to the dc590b board. the dc590b allows the evalu- ation at approximately a 200hz sample rate (f smpl ). (see http://cds.linear.com/docs/reference%20design/dc590b. pdf). for higher sample rates the digital i/o pins can be accessed directly on the board. contact ltc applications for more information on higher sample rate evaluation. rf input matching the input resistance is about 205. input capacitance is 1.6pf. the impedance vs frequency of the rf input is detailed in the following table. applications information a shunt 68 resistor can be used to provide a broadband match at low frequencies up to 1ghz and from 4.5ghz to 6ghz. as shown in figure 3, a nominal broadband input m a t c h c a n b e a c h i e v e d u p t o 1. 8 g h z b y u s i n g a n l c m a t c h - ing circuit consisting of a series 3.3nh inductor (l1) and a shunt 1.8pf capacitor (c1). this match will maintain a return loss of about 10db across the band. for matching at higher frequencies, l1 and c1 values are listed in the table of figure 1. the input reflection coefficient referenced to the rf input pin with no external components is shown on the smith chart in figure 4. alternatively, it is possible to match using an impedance transformation network by omitting r1 and transforming the 205 input to 50. this narrow band matching will improve sensitivity up to about 6db max, and the dynamic range remains the same. for example: by omitting r1 and setting l1 = 1.8nh and c1 = 3pf, a 2:1 vswr match can be obtained from 1.95ghz to 2.36ghz with a sensitivity improvement of 5db. table 1. rf input impedance frequency (mhz) input impedance () s11 mag angle () 10 203.3-j1.4 0.605 C0.7 50 201.8-j7.0 0.605 C3.7 100 197.2-j13.7 0.606 C7.3 200 161.9-j25.8 0.608 C14.6 400 142.5-j43.6 0.614 C28.9 500 125.3-j48.5 0.619 C35.8 800 88.0-j60.4 0.636 C55.6 900 79.2-j62.6 0.643 C61.8 1000 71.8-j64.3 0.650 C67.7 1500 46.6-j68.8 0.685 C94.3 2000 31.1-j69.2 0.715 C116 2100 29.9-j69.0 0.721 C119.9 2500 22.4-j66.8 0.739 C134.1 3000 15.3-j60.7 0.756 C149.6 3500 9.9-j47.3 0.768 C163.2 4000 6.6-j16.9 0.779 C175.5 5000 9.8-j51.7 0.787 162.1 6000 18.5-j69.4 0.792 141.4 datasheet.in
LTC5587 14 5587f applications information the rf input dc-blocking capacitor (c2) and c sq bias decoupling capacitor (c3), can be adjusted for low-fre- quency operation. for input frequencies down to 10mhz, 0.01f is needed at c sq . for frequencies above 250mhz, the on-chip 20pf decoupling capacitor is sufficient and c sq may be eliminated as desired. the dc-blocking ca- pacitor can be as large as 2200pf for 10mhz operation or 100pf for 2ghz operation. a dc-blocking capacitor larger than 2200pf results in an undesirable rf pulse response on the falling edge due to the rectifier action of the diode limiter/esd protection at the rf pin. therefore, the recommended value for c2 for general applications is conservatively set at 1000pf. figure 4. input reflection coefficient figure 3. simplified schematic of the rf input interface 5587 f03 LTC5587 205 20pf c sq v cc rf c1 l1 r1 68 c2 1000pf c3 0.01f rf in (matched) 7 6 filter capacitor the interface of the v out pin of the LTC5587 is shown in figure 5. it includes a push-pull output stage with a series 300 resistor. the detector output stage is capable of sourcing and sinking 5ma of current. the v out pin can be shorted to gnd or v cc (or v dd whichever is lower) without damage, but going beyond the v cc + 0.5v or v dd + 0.5v and alternatively going beyond gnd C 0.5v may result in damage as the internal esd protection diodes will start to conduct excessive current. the residual ripple due to rf modulation can be reduced by adding an external capacitor, c filt (c4 on evaluation circuit schematic) to the v out pin to form a simple rc lowpass filter. the internal 300 resistor in series with the output pin enables filtering of the output signal with just the addition of c filt . the filter C3db corner frequency, f c , can be calculated with the following equation: f c(C3db) = 1/(2 ? ? 300 ? c filt ) with f c in hz and c filt in f. since the bandwidth of the detected signal is effectively limited by the internal 150khz filter, a choice of c filt = 1000pf sets the adc C3db input bandwidth at 530khz and does not affect the residual modulation ripple much. c filt has a small effect on adc sampling accuracy. for example, when the sample rate of the adc is changed from 25ksps to 500ksps, the output value changes less than 0.2db with any choice of c filt . figure 5. simplified schematic of the detector analog output 5587 f05 LTC5587 input 40a 300 v dd v cc v out c filt v out filtered 4 12-bit adc s/h 5587 f04 4ghz 1.8ghz 10mhz 6ghz 3ghz 900mhz 500mhz datasheet.in
LTC5587 15 5587f applications information figure 6 shows the effect of the external filter capacitor on the residual ripple level for a 4-carrier wcdma downlink signal at 2.14ghz with C10dbm. adding a 0.047f capaci- tor to the output decreases the peak-to-peak output ripple from 150lsb to about 60lsb. figure 6. residual ripple, output transient response for rf pulse with wcdma 4-carrier modulation figure 7. residual ripple for 2.6ghz wimax ofdm 802.16-2004 figure 8. residual ripple, output transient times for rf pulse with wcdma 4-carrier modulation vs external filter capacitor c4 figure 7 shows the transient response for a 2.6ghz wimax signal with preamble and burst ripple reduced by a fac- tor of three using a 0.047f external filter capacitor. the average power in the preamble section is C10dbm, while the burst section has 3db lower average power. with the capacitor, the ripple in the preamble section is about 0.5db peak to peak. the modulation used was ofdm (wimax 802.16-2004) mmds band 1.5mhz bw, with 256 size fft and 1 burst at qpsk ?. figure 8 shows how the peak-to-peak ripple decreases with increasing external filter capacitance value. also shown is how the rf pulse response will have longer rise and fall times with the addition of this lowpass filter cap. figure 9 shows the rise time and fall time is a strong function of the rf input power when the filter capacitor is not present. figure 9. rf pulse response rise time and fall time vs rf input power external capacitor (f) 0.001 output ripple peak-to-peak (db) rise time and fall time (s) 3 5 7 2 1 0.01 0.1 1 0 9 4 6 8 100 10 1 1000 5587 f08 t a = 25c ripple rise fall input power (dbm) C30 rise time and fall time (s) 6 7 8 5 4 C20 C10 C25 C15 C5 0 5 1 0 3 9 2 5587 f09 fall time rise time t a = 25c time (msec) 0 adc output (lsb) adc output (lsb) 3500 4000 0.2 0.4 0.6 1000 2500 1500 3000 500 0 2000 2800 3300 3400 3100 2700 3200 2600 3000 2900 0.1 0.3 0.8 0.5 0.7 0.9 1.0 5587 f06 t a = 25c no cap 0.047f time (msec) 0 adc output (lsb) 3500 0.4 0.8 1.2 1000 2500 1500 3000 500 0 2000 0.2 0.6 1.6 1 1.4 1.8 2 5587 f07 t a = 25c no cap 0.047f datasheet.in
LTC5587 16 5587f applications information for a given rf modulation type, wcdma for example, the internal 150khz filter provides nominal filtering of the residual ripple level. additional external filtering happens in the log-domain, which introduces a systematic log-er- ror in relation to the signals crest factor as shown in the following equation in db 1 : error| db = 10 ? log 10 (r + (1-r)10 Ccf/10 ) C cf ? (r-1) where cf is the crest factor and r is the duty cycle of the measurement (or number of measurements made at the peak envelope divided by the total number of periodic measurements in the measurement period). it is important to note that the cf refers to the 150khz low-pass filtered envelope of the signal. the error will depend on the statis- tics and bandwidth of the modulation signal in relation to the internal 150khz filter. for example: simulations have shown for the case of wcdma that it is possible to set the external filter capacitor corner frequency at 15khz and only introduce an error less than 0.1db. figure 10 shows the output ac modulation ripple as a function of modulation difference frequency for a 2-tone input signal at 2140mhz with C10dbm input power. the resulting deviation in the output voltage of the detector shows the effect of the internal 150khz filter. the output voltage noise density and integrated noise are shown respectively in figures 11 and 12 for various input power levels. the noise is a strong function of input level and there is roughly a 10db improvement in the output noise level for an input level of 0dbm versus no input. figure 10. output dc voltage deviation and residual ripple vs 2-tone separation frequency 2-tone frequency separation (mhz) 0.001 output ac ripple (db) deviation of output voltage (db) 15 20 25 10 5 0.01 0.1 1 10 0 30 C1.5 C1.0 C0.5 C2.0 C2.5 C3.0 0 5587 f10 t a = 25c figure 11. output voltage noise density figure 12. integrated output voltage noise frequency (khz) 0.1 noise voltage (v rms / hz) 2.0 4.0 10 1.0 3.5 1.5 0.5 0 3.0 2.5 1 100 1000 5587 f11 0dbm C10dbm C20dbm C30dbm no rf input t a = 25c frequency (khz) 0.1 integrated noise (mv rms ) 0.8 1.8 2.0 10 0.4 1.4 0.6 1.6 0.2 0 1.2 1.0 1 100 1000 5587 f12 0dbm C10dbm C20dbm C30dbm no rf input t a = 25c 1. steve murray, beware of spectrum analyzer power averaging techniques, microwaves & rf, dec. 2006. datasheet.in
LTC5587 17 5587f applications information the total noise at the adc output is dominated by the output noise of the detector, and the sampling noise is insignificant. the peak-to-peak output noise is also almost independent of the sample rate. figure 13 shows the peak-to-peak noise at the adc output as a function of the rf input level for a cw rf input. increasing c filt from 1000pf to 0.01f gives roughly 2x to 3x lower noise over input power. data transfer a rising conv edge starts a conversion and disables sdo. after the conversion, the adc automatically goes into sleep mode, drawing only leakage current. conv going low enables sdo and clocks out the msb bit, b11. sck then synchronizes the data transfer with each bit being transmitted on the falling sck edge and can be captured on the rising sck edge. after completing the data transfer, if further sck clocks are applied with conv low, sdo will output zeros indefinitely (see figure 14). for example, 16-clocks at sck will produce the 12-bit data and four trailing zeros on sdo. sleep mode the LTC5587 adc enters sleep mode to save power after each conversion if conv remains high. in sleep mode, all bias currents are shut down and only leakage currents remain (about 0.1a). the sample-and-hold is in hold mode while the adc is in sleep mode. the adc returns to sample mode after the falling edge of conv during power-up. exiting sleep mode and power-up time by taking conv low, the adc powers up and acquires an input signal completely after the acquisition time (t acq ). after t acq , the adc is ready to perform a conversion again by a rising edge on conv. figure 13. peak-to-peak noise at adc output vs rf input power serial interface the LTC5587 communicates with microcontrollers, dsps and other external circuitry via a 3-wire interface. figure 14 shows the operating sequence of the serial interface. 35 30 25 15 10 5 20 0 40 0.525 0.45 0.375 0.225 0.15 0.075 0.3 0 0.6 rf input power (dbm) adc output noise (p-p lsb) adc output noise (db p-p ) C40 C30 10 C20 C10 0 5587 f13 t a = 25c f smpl = 500ksps c filt = 1000pf c filt = 0.01f figure 14. LTC5587 serial interface timing diagram 1 recommended high or low hi-z state 234 t 6 t 5 t 4 t 7 t 8 5587 f14 t 3 9101112 b11 (msb) *after completing the data transfer, if further sck clocks are applied with conv low, the adc will output zeros indefinitely by taking conv low, the device powers up and acquires an input accurately after t acq sleep mode t conv conv sck sdo t 1 t acq t throughput t 2 b10 b9 b3 b2 b1 b0* datasheet.in
LTC5587 18 5587f applications information conversion range the v ref pin defines the full-scale range of the adc. the reference voltage can range from v dd down to 1.4v. if the difference between the input voltage on the v out pin and gnd exceeds v ref , the output code will stay fixed at all ones, and if this difference goes below 0v, the output code will stay fixed at all zeros. figure 15 shows the ideal input/output characteristics for the adc. the code tran- sitions occur midway between successive integer lsb values (i.e., 0.5lsb, 1.5lsb, 2.5lsb, , fs C 1.5lsb). t he ou tpu t code is s tr aigh t binar y w i th 1l sb = v ref /4096. using the onboard 1.8v reference on the evaluation board, the conversion range can be easily calculated between lsb and dbm. for an analog output slope of 32mv/db, we can calculate the total 40db range is equivalent to 2912.7lsbs at the adc output: 40db = (40db ? 4096lsb ? 32mv/db)/1.8v = 2912.7lsb detector enable pin a simplified schematic of the en pin is shown in figure 16. to enable the LTC5587 detector it is necessary to put greater than 2v on this pin. to disable or turn off the detector, this voltage should be below 0.3v. at an enable voltage of 3.3v the pin draws roughly 20a. if the en pin is not connected, the detector circuitry is disabled through an internal 500k pull-down resistor. it is important that the voltage applied to the en pin should never exceed v cc by more than 0.5v. otherwise, the supply current may be sourced through the upper esd protection diode connected at the en pin. figure 15. adc transfer characteristics input voltage (v) 0 1lsb unipolar output code 111...111 111...110 5587 f15 000...001 000...000 fs C 1lsb 5587 f16 LTC5587 v cc en 500k 300k 9 300k figure 16. enable pin simplified schematic datasheet.in
LTC5587 19 5587f information furnished by linear technology corpor ation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- t i o n t h a t t h e i n t e r c o n n e c t i o n o f i t s c i r c u i t s a s d e s c r i b e d h e r e i n w i l l n o t i n f r i n g e o n e x i s t i n g p a t e n t r i g h t s . package description 3.00 0.10 (4 sides) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad and tie bars shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.65 0.10 0.75 0.05 r = 0.115 typ 1 6 12 7 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dd12) dfn 0106 rev a recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.23 0.05 0.25 0.05 2.25 ref 2.38 0.05 1.65 0.05 2.10 0.05 0.70 0.05 3.50 0.05 package outline pin 1 notch r = 0.20 or 0.25 45 chamfer 2.38 0.10 2.25 ref 0.45 bsc 0.45 bsc dd package 12-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1725 rev a) datasheet.in
LTC5587 20 5587f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0810 ? printed in usa typical application 10mhz to 6ghz infrastructure power amplifier level control related parts part number description comments rf power detectors ltc5505 rf power detectors with >40db dynamic range 300mhz to 3ghz, temperature compensated, 2.7v to 6v supply ltc5507 100khz to 1000mhz rf power detector 100khz to 1ghz, temperature compensated, 2.7v to 6v supply ltc5508 300mhz to 7ghz rf power detector 44db dynamic range, temperature compensated, sc70 package ltc5509 300mhz to 3ghz rf power detector 36db dynamic range, low power consumption, sc70 package ltc5530 300mhz to 7ghz precision rf power detector precision v out offset control, shutdown, adjustable gain ltc5531 300mhz to 7ghz precision rf power detector precision v out offset control, shutdown, adjustable offset ltc5532 300mhz to 7ghz precision rf power detector precision v out offset control, adjustable gain and offset lt5534 50mhz to 3ghz log rf power detector with 60db dynamic range 1db output variation over temperature, 38ns response time, log linear response ltc5536 precision 600mhz to 7ghz rf power detector with fast comparator output 25ns response time, comparator reference input, latch enable input, C26dbm to +12dbm input range lt5537 wide dynamic range log rf/if detector low frequency to 1ghz, 83db log linear dynamic range lt5538 75db dynamic range 3.8ghz log rf power detector 0.8db accuracy over temperature ltc5582 60db dynamic range rms detector 40mhz to 10ghz, 0.5db accuracy over temperature lt5581 6ghz rms power detector, 40db dynamic range 1db accuracy over temperature, log linear response, 1.4ma at 3.3v infrastructure lt5568 700mhz to 1050mhz high linearity direct quadrature modulator 22.9dbm oip3 at 850mhz, C160.3dbm/hz noise floor, 50 , 0.5v dc baseband interface, 3-ch cdma2000 acpr = C71.4dbc at 850mhz lt5572 1.5ghz to 2.5ghz high linearity direct quadrature modulator 21.6dbm oip3 at 2ghz, C158.6dbm/hz noise floor, high-ohmic 0.5v dc baseband interface, 4-ch w-cdma acpr = C67.7dbc at 2.14ghz lt5579 1.5ghz to 3.8ghz high linearity upconverting mixer 27.3dbm oip3 at 2.14ghz, 9.9db nf, 2.6db conversion gain, C35dbm lo leakage ltc5598 5mhz to 1600mhz high linearity direct quadrature modulator 27.7dbm oip3 at 140mhz, C161.2dbm/hz noise floor, 0.5v dc baseband interface, C55dbm lo leakage and 50.4dbc image rejection at 140mhz ltc5588-1 200mhz to 6ghz very high linearity direct quadrature modulator 30dbm oip3 at 2.14ghz, optimizable to 35dbm, C160.5dbm/hz output noise floor, 0.5v dc baseband interface 5587 ta01a sdo sck ov dd v out gnd c sq gnd conv v dd v ref en v cc rf 12 11 10 9 8 7 13 LTC5587 1f 1f rf in 0.01f 1000pf 1000pf l match c match 68 1f 3.3v dc 1 2 3 4 5 6 power amp digital power control rf coupler rf out 50 datasheet.in

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